The invention is an improved analog to digital converter.
In the near future a substantial part of all long distance information transmission, e.g. voice, facsimile, data, TV, will be carried out in digital form. Thus, analog to digital converters (A/DC) and digital to analog converters (D/AC) will be an integral part of all modems for information transmission and can represent a substantial part of the costs of such modems. Certain types of information, e.g., voice, telemetry, is relatively slow and can be easily handled by simple and inexpensive series operated A/DC with precisions of 5 to 15 bits and conversion times in excess of five microseconds. For television and other analog signals with frequencies over 0.5 MHz, a conversion time of much less than one microsecond is necessary. Consequently, parallel or series-parallel converters, which are complex, expensive and usually have a precision of less than 9 bits, are used. Examples of the parallel and series-parallel converters for high speed conversion are found in O. A. Horna, "A 150 Mb/s A/D and D/A Conversion System", COMSAT Technical Review, Vol. 2, No. 1, Spring 1972, pp. 39-72, (hereinafter Reference 1).
In transmission systems of the above-described type wherein information from different channels is multiplexed into a single bit stream, each channel typically has its own A/DC, with multiplexing performed on the digital side of the modem. However, advances in solid state switches permit multiplexing on the analog side provided a very fast A/DC converter is available for use on the multiplexed analog information stream. Such techniques will result in a reduction in the number of A/DC converters necessary in the modem. It is explained in Reference 1 that there are only two configurations possible for very fast (Tc&lt;&lt;1 usec) converters. They are the parallel type, an example of which is shown in FIG. 7 of Reference 1, and the series-parallel type, an example of which is shown in FIG. 8 of Reference 1.
As will be understood by those skilled in the art, and as can be ascertained from Reference 1, the basic building block of both types of converters is the same. FIG. 4 of Reference 1 shows an eight comparator quantizer which serves as the basic building block for the parallel and series-parallel converters of FIGS. 7 and 8, respectively. An eight comparator quantizer, which is used herein only as a representative example, provides eight quantization levels which can be fully represented by a three bit code.
A disadvantage of the parallel type converter is that it requires 2.sup.n comparators, where n is the number of bits required to encode an analog signal. For example, if it is desired to provide sixteen discrete quantization levels for an analog signal, this can be fully encoded into four binary bits (i.e., n=4). The number of comparators required is 2.sup.4 =16. A four bit A/DC utilizing sixteen comparators (two 8-comparator building blocks) is shown in FIG. 7 of Reference 1.
A series-parallel type converter using sixteen comparators, eight each in the first and second stages, can convert the same analog signal into a six bit code, thereby providing a total of 2.sup.6 =64 discrete quantization levels. This is illustrated in FIG. 8 of Reference 1. The latter approach requires substantially fewer comparators for a given bit output. Nevertheless, the converter of the latter type requires additional hardware: a sample-and-hold circuit, a D/AC for each stage except the last stage, and a device to produce a difference voltage, .DELTA.V. Also, if a differential amplifier is used to amplify the difference voltages, .DELTA.V, the ultimate conversion precision is still determined by the properties of the first stage comparator. This latter fact requires that the comparison in the first stage be made only after the transients have settled down to a value required by the precision of the whole device. This limits the speed and the precision of the converter with given comparators and sample-and-hold circuits.